This session includes two invited talks

The Hidden Costs of Open-Source Hardware Research

Prof. Blaise Tine - UCLA

In this talk, Dr. Tine will delve into the challenges and trade-offs inherent in open-source hardware research. While open-source initiatives
democratize hardware development and foster innovation, they also introduce hidden complexities that can impact adoption, collaboration,
and long-term sustainability. Drawing from his extensive experience in open-source hardware and system design, Dr. Tine will shed light on
these often-overlooked challenges and offer strategies for researchers and practitioners to navigate them effectively. Looking ahead, Dr. Tine will discuss
emerging trends that could shape the future of open-source hardware research.

CGRAs for the Edge: Balancing Compute Efficiency and Flexibility

Prof. Henk Corporaal (Eindhoven University of Technology)

Driven by AI and advanced signal-processing developments we observe a huge increase of computational requirements. Not only in the
cloud, but even more at the Edge. There are substantial advantages of performing computation locally at the edge, like less data traffic,
performing the computation close to the sensing data, reliability, real-time feedback and data privacy. This drives a strong demand for smart
Edge computing. Edge compute devices have limited resources, and therefore require high energy- and area-efficient computing.
This naturally demands for highly specialized processors. However, high specialization typically means high development costs and lower volume. Much worse,
it makes them inflexible; they cannot adapt to (late) application changes and code updates, which are very common in our fast moving (software) world. Coarse
Grain Reconfigurable Architectures (CGRAs) may be the solution; they aim to find a good balance between flexibility and compute efficiency. They can be easily
tuned and scaled for application domains, while staying flexible, especially when they are fully programmable. In this presentation, we give an overview of
CGRAs and their recent developments. We more precisely define and characterize CGRAs. We also present a metric for flexibility. Designing CGRAs results into
various challenges. We illustrate key concepts and challenges using the recent open-source R-Blocks CGRA as example. Finally, we conclude by offering a
glimpse into the CGRA future, exploring potential breakthroughs on the horizon.

In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems.
The platform is based on a multiprocessor NOEL-V, an established space-grade processor, which is integrated with the SPARROW AI accelerator and connected to a GPU, Vortex. Both processing systems follow the RISC-V specification. This is a novel hardware architecture for the space domain as the use of massive parallel processing units, such as GPUs, is starting to be considered for upcoming space missions due to the increased performance required to future space-related workloads, in particular, related to AI. However, such solutions are only currently adopted for New Space, since their limitations come not only from the hardware, but also from the software, which needs to be qualified before being deployed on an institutional mission.
For this reason, the METASAT platform is one of the first endeavors towards enabling the use of high performance hardware in a qualifiable environment for safety critical systems. The software stack is based on baremetal, RTEMS and the XtratuM hypervisor, providing different options for applications of various degrees of criticality.
The platform has been tested with space-relevant AI workloads taking full advantage of the hardware resources, even when multiple tasks are sharing the GPU.