DATE Throug the Years
Photos are available in the DATE 2025 Gallery.
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Survey: Conference Evaluation, Suggestions & Comments
This survey is available from Monday, 31 March 2025, 15:00 CET to Friday, 4 April 2025, 17:00 CET.
Your opinions will be most appreciated and will help the committee to maintain future DATE conferences at the highest quality and even increase the relevance of the event in the European Design and Test community. Thank you for your time and support!
DATE 2025 Awards
EDAA Achievement Award 2025
Subhasish Mitra, Stanford University, US
in recognition of outstanding contributions to EDA and its community.
https://date25.date-conference.com/edaa-achievement-award-2025-goes-sub…
IEEE Fellow
Wenjian Yu, Tsinghua University, CN
for contributions to parasitic extraction, circuit simulation and related numerical methods
IEEE CEDA Service Award
Andy Pimentel, University of Amsterdam, NL
for outstanding contributions to DATE as General Chair of DATE 2024
IEEE CS TTTC Outstanding Contribution Award
Aida Todri-Sanial, Eindhoven University of Technology, NL
for outstanding contributions to DATE as General Chair of DATE 2025
EDAA Outstanding Dissertation Awards
Topic 1 New directions in systems design methods and tools, simulation and validation, embedded software design and optimization for embedded, cyber physical, secure and learning systems
Deterministic Reactive Programming for Cyberphysical Systems
Christian Menard, TU Dresden, DE
Advisor: Jerónimo Castrillón Mazo, TU Dresden, DE
Topic 2 New directions in SoC platforms co design, novel architectures for future computing in design flows, and power management
Computation In Memory based Edge AI for Healthcare A Cross Layer Approach
Sumit Diware, TU Delft, NL
Advisor: Rajendra Bishnoi, TU Delft, NL
Topic 3 New directions in logic, physical design and CAD for analog/mixed signal, nano scale and emerging technologies
Design Automation Tools and Software for Quantum Computing
Lukas Burgholzer, JK U Linz, AT
Advisor: Robert Wille, TUM, DE
Topic 4 New directions in safety, reliability and security aware hardware design, validation and test
Preventing IP Theft in Heterogeneous 2.5D/3D Integrated Circuits
Jonti Talukdar, Duke University, US
Advisor: Krishnendu Chakrabarty, Duke University, US
DATE Fellow Award
Yervant Zorian, Synopsys, US
for many years of outstanding contributions for DATE and its test community
Andy Pimentel, University of Amsterdam, NL
for outstanding service contribution for DATE as General Chair of DATE 2024
Best Paper Awards
D Track
Timing Driven Global Placement by Efficient Critical Path Extraction
Yunqi Shi 1, Siyuan Xu 2, Shixiong Kai 2, Xi Lin 1, Ke Xue 1, Mingxuan Yuan 3 and Chao Qian 1
1 Nanjing University, CN; 2 Huawei Noah's Ark Lab, CN; 3 Huawei Noah's Ark Lab, HK
(Session BPA01)
A Track
A Lightweight CNN for Real Time Pre Impact Fall Detection
Cristian Turetta 1, Muhammed Toqeer Ali 1, Florenc Demrozi 2 and Graziano Pravadelli 1
1 Università di Verona, IT; 2 Department of Electrical Engineering and Computer Science, University of Stavanger, NO
(Session BPA04)
T Track
A Soft Error Tolerant Flip Flop for eFPGA Configuration Hardening in 22nm FinFET Process
Prashanth Mohan 1, Siddharth Das 1, Oguz Aatli 1, Josh Joffrion 2 and Ken Mai 1
1 Carnegie Mellon University, US; 2 Sandia National Laboratories, US
(Session BPA03)
E Track
Cocktail: Chunk Adaptive Mixed Precision Quantization for Long Context LLM Inference
Wei Tao 1, Bin Zhang 1, Xiaoyang Qu 2, Jiguang Wan 1 and Jianzong Wang 2
1 Huazhong University of Science & Technology, CN; 2 Ping An Technology ( shenzhen ) Co ., Ltd, CN
(Session BPA04)
Outstanding Reviewer Awards
D Track
Chang Meng, EPFL, Lausanne, CH
Bonan Yan, Peking University, CN
Yangdi Lyu, Hong Kong U. of Science and Technology, CN
Alan Hu, University of British Columbia, CA
A Track
Mirjana Stojilovic, EPFL, Lausanne, CH
Geoff Merrett, University of Southhampton, UK
T Track
Soundes Marzougui, ST Microelectronics, Diegem, BE
Sarah Azimi, Politecnico di Torino, IT
E Track
Frank Hannig, Friedrich Alexander Universität Erlangen Nürnberg, DE
Anup Kumar Das, Drexel University, US
University Fair Award
ARBoard, the future of PCB debug
Giorgio Insinga, Pietro Bella and Paolo Bernardi, Politecnico di Torino, IT
Young People Programme Hack@DATE Competition Award
HASS Lab Team
Hao Lyu, Zhiqing Rui, Chengjie Wang, Zhiyuan Li, Xiang Ling and Jingzheng Wu, University of Chinese Academy of Sciences, CN
In recognition of outstanding performance in hardware security threat detection
ASD Outstanding Paper Award
Modeling the SL LET paradigm in AUTOSAR Adaptive
Davide Bellassai, Evidence S.r.l., Scuola Superiore Sant’Anna
Gerlando Sciangula, Huawei and Scuola Superiore Sant’Anna
Claudio Scordino, Huawei
Daniel Casini, Scuola Superiore Sant’Anna
Alessandro Biondi, Scuola Superiore Sant’Anna
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Download DATE 2025 Proceedings
Download of DATE 2025 Proceedings is possible below after login.
You have been informed about your login credentials after your registration for the conference.
If you can't see the download link below after successful login, please check the registration desk or contact
Conference Organisation | RegistrationAnja Schröter, K.I.T. Group GmbH Dresden, DE
date-registration@kitdresden.de
Venue
Centre de Congrès de Lyon (CCC Lyon)
50 Quai Charles de Gaulle
69006 Lyon
France
Website
DATE 2025 entrance: Entrance H
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Authors' Guidelines for Audio-Visual Presentation
This document describes the guidelines to prepare and present audio-visual materials at DATE 2025. Please read all instructions carefully and follow them strictly to maintain the highest possible standards. Even experienced speakers should read the following paragraphs, as they cover several problems that have arisen over the years.
DATE provides a centralised presentation management system for speakers of D, A, T and E Track sessions, Late Breaking Results paper presentations, Multi-Partner Project presentations, Focus Sessions, Special Day and Special Initiative ASD presentations as well as presentations in line with the Young People Programme. It will not be possible to use own devices for presentations in the session rooms.
The centralised presentation management will not be provided for workshops (incl. Special Initiative ASD workshop) and embedded tutorials. Workshop and embedded tutorial speakers will receive presentation information from the workshop/embedded tutorial organisers.
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Registration & Participation
The online registration to the conference is only possible via the online registration platform which is available until 2 April 2025. Please kindly note that everyone who wants to attend the conference or single sessions, must create an account and register, with which you can check your registration or make additional programme bookings later. If you participated in DATE 2024 in Valencia, Spain, please use the same login data.
Click here to create your account and register for DATE 2025
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Authors' Guidelines for Camera-Ready Submission of Accepted Papers
Deadline: Friday, 17 January 2025 AoE
Your submission for DATE 2025 has been accepted. Congratulations!
This page contains instructions to prepare the final material required to publish your contribution in time for the conference.
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EDAA Achievement Award 2025 goes to Subhasish Mitra
The Achievement Award is given to individuals who made outstanding contributions to the state of the art in electronic design, automation and testing of electronic systems in their life. To be eligible, candidates must have made innovative contributions that impacted how electronic systems are being designed.
Past recipients have been Kurt ANTREICH (2003), Hugo DE MAN (2004), Jochen JESS (2005), Robert BRAYTON (2006), Tom W. WILLIAMS (2007), Ernest S. KUH (2008), Jan M. RABAEY (2009), Daniel D. GAJSKI (2010), Melvin A. BREUER (2011), Alberto L. SANGIOVANNI-VINCENTELLI (2012), Peter MARWEDEL (2013), Rolf ERNST (2014), Lothar THIELE (2015), Giovanni DE MICHELI (2016), C. L. David LIU (2017), Mary Jane IRWIN (2018), Jacob ABRAHAM (2019), Luca BENINI (2020), Georges GIELEN (2021), Edward A. LEE (2022), Jason Cong (2023), and Ingrid Verbauwhede (2024).
Subhasish Mitra holds the William E. Ayer Endowed Chair Professorship in the Departments of Electrical Engineering and Computer Science at Stanford University. He directs the Stanford Robust Systems Group, serves on the leadership team of the Microelectronics Commons AI Hardware Hub funded by the US CHIPS and Science Act, leads the Computation Focus Area of the Stanford SystemX Alliance, and is the Associate Chair (Faculty Affairs) of Stanford Computer Science. His research ranges across Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences. Results from his research group have influenced almost every contemporary electronic system and have inspired significant government and research initiatives in multiple countries. He has held several international academic appointments — the Carnot Chair of Excellence in NanoSystems at CEA-Leti in France, Invited Professor at EPFL in Switzerland, and Visiting Professor at the University of Tokyo in Japan. Prof. Mitra also has consulted for major technology companies including Cisco, Google, Intel, Merck (EMD Electronics), Samsung, and Xilinx (now AMD).
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